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A 0.42-Nanometer Shield Unlocks Transistors Beyond Silicon

As traditional silicon microchips near their physical limit, engineers have spent years trying to craft transistors from materials just a single atom thick. According to ScienceDaily, researchers at National Yang Ming Chiao Tung University and TSMC have bridged this gap by creating an atomic interface layer measuring just 0.42 nanometers. This structural breakthrough solves a decade-long tradeoff between electrical control and electron speed that threatened to stall the future of computing.

#semiconductors #nanotechnology #microchips #physics
Diagram showing an engineered 0.42-nanometer atomic interface between a 2D molybdenum disulfide semiconductor and gate dielectric layer.
Diagram showing an engineered 0.42-nanometer atomic interface between a 2D molybdenum disulfide semiconductor and gate dielectric layer. · Image source: ScienceDaily

An Atomic Wall Halts Microchip Miniaturization

Think of a microchip transistor as a microscopic light switch controlling the flow of digital signals. To turn the switch on and off cleanly, chipmakers place an insulating gate layer directly above the semiconductor channel. For over a decade, physicists have recognized that two-dimensional semiconductors like molybdenum disulfide—sheets of atoms thinner than a strand of DNA—could replace silicon in next-generation processors. However, depositing the necessary insulating layers onto these ultra-thin sheets disrupted their delicate atomic structure, causing moving electrons to scatter and lose momentum.

«For many years, efforts to improve atomically thin transistors largely focused on discovering better semiconductor materials,» explained study corresponding author Professor Wen-Hao Chang. «Our research shows that the atomic interface between materials can be just as important. By engineering that boundary, we were able to reduce one of the fundamental tradeoffs that has limited two-dimensional transistors for many years.»

Engineering a 0.42-Nanometer Buffer Layer

Rather than searching for an entirely new semiconductor, researchers at National Yang Ming Chiao Tung University, collaborating with TSMC Corporate Research, targeted the microscopic junction where the materials connect. The team deposited an ultrathin layer of aluminum directly onto monolayer molybdenum disulfide and carefully oxidized it to form a protective aluminum oxide buffer measuring just 0.42 nanometers in thickness.

According to research published in Nature Electronics on 9 August 2026, this ultra-thin interface performs two simultaneous functions: it creates a uniform template for growing high-dielectric hafnium oxide while acting as an atomic shield that prevents unwanted electrical interference.

In rigorous electrical evaluations, short-channel transistors built with this engineered interface demonstrated outstanding physical metrics:

  • Achieved an equivalent oxide thickness of approximately 1 nanometer without degrading electron transport.
  • Delivered a peak transconductance of 0.45 mS µm⁻¹ across 100-nanometer channel lengths.
  • Maintained low leakage current and minimal hysteresis during high-frequency operational switching.

Moving 2D Electronics From Lab Bench to Wafer Scale

The true significance of this discovery lies in how the material was synthesized. Previous experimental 2D devices relied on microscopic flakes peeled by hand from bulk crystals—a method suitable for laboratory demonstrations but impossible to scale in commercial foundries. By demonstrating this 0.42-nanometer interface on chemical vapor deposition monolayers grown across full semiconductor wafers, the research team proved that 2D transistors can be integrated into industrial production lines.

As microchip components approach atomic dimensions, the physical boundary is no longer simply a passive divider between materials. Instead, it becomes an active, engineered component of the transistor itself, offering semiconductor manufacturers a clear path to continue scaling computer performance beyond the physical boundaries of silicon.

Why it matters

The transition from silicon to two-dimensional materials represents the most significant architectural shift in microelectronics since the invention of the integrated circuit. By solving the interface scattering problem with a 0.42-nanometer buffer, TSMC and academic partners have eliminated the primary bottleneck preventing commercial 2D chip manufacturing. For global tech industries, high-performance computing centers, and consumer electronics makers, this development provides a concrete timeline for sub-1-nanometer process nodes. Commercial adoption of CVD-grown monolayer transistors is expected to enter industrial pilot lines by 2028, paving the way for ultra-low-power artificial intelligence hardware and hyper-dense mobile processors.

FAQ

Why are traditional silicon transistors reaching their limit?
Silicon transistors encounter severe quantum leakage and heat dissipation issues when shrunk below a few nanometers. Atomically thin materials can operate at smaller dimensions, but attaching insulating layers previously degraded their electron mobility.
How does the 0.42-nanometer atomic buffer solve the transistor bottleneck?
The ultrathin aluminum oxide buffer creates a smooth interface between molybdenum disulfide and the gate dielectric. This protects electron flow from surface scattering while maintaining tight electrical control over the channel.
When will 2D transistors appear in commercial devices?
Because the researchers demonstrated the process using wafer-scale chemical vapor deposition rather than lab flakes, industrial integration into advanced manufacturing pilot lines is targeted for around 2028.